diff options
| author | Vignesh Raghavendra <vigneshr@ti.com> | 2020-01-27 10:36:39 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2020-01-27 22:27:22 +0530 |
| commit | d640772021589214bd7606d481ae1f52fbe62fe6 (patch) | |
| tree | ee992aefb043954c71dd35d916ed3ecd0c2b43fa /drivers/spi/cadence_qspi.h | |
| parent | 370d33bc8c778cc3a133d651b54db0d02e639a91 (diff) | |
spi: cadence_qspi: Move to spi-mem framework
Current Cadence QSPI driver has few limitations. It assumes all read
operations to be in Quad mode and thus does not support SFDP parsing.
Also, adding support for new mode such as Octal mode would not be
possible with current configuration. Therefore move the driver over to spi-mem
framework. This has added advantage that driver can be used to support
SPI NAND memories too.
Hence, move driver over to new spi-mem APIs.
Please note that this gets rid of mode bit setting done when
CONFIG_SPL_SPI_XIP is defined as there does not seem to be any user to
that config option.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'drivers/spi/cadence_qspi.h')
| -rw-r--r-- | drivers/spi/cadence_qspi.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 99dee75bbd..d66201ec92 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -55,17 +55,16 @@ void cadence_qspi_apb_controller_enable(void *reg_base_addr); void cadence_qspi_apb_controller_disable(void *reg_base_addr); int cadence_qspi_apb_command_read(void *reg_base_addr, - unsigned int cmdlen, const u8 *cmdbuf, unsigned int rxlen, u8 *rxbuf); + const struct spi_mem_op *op); int cadence_qspi_apb_command_write(void *reg_base_addr, - unsigned int cmdlen, const u8 *cmdbuf, - unsigned int txlen, const u8 *txbuf); + const struct spi_mem_op *op); int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat, - unsigned int cmdlen, unsigned int rx_width, const u8 *cmdbuf); + const struct spi_mem_op *op); int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat, unsigned int rxlen, u8 *rxbuf); int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, - unsigned int cmdlen, unsigned int tx_width, const u8 *cmdbuf); + const struct spi_mem_op *op); int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat, unsigned int txlen, const u8 *txbuf); |