diff options
| author | Wolfgang Denk <wd@denx.de> | 2009-12-05 02:11:59 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-12-05 02:11:59 +0100 |
| commit | 2a49bf3149e34e6f910e70bbc0a26e81cfdbdf70 (patch) | |
| tree | e19b3def6c8f41f56cdb5e8b71aa53d8f72f5812 /drivers/spi/atmel_dataflash_spi.c | |
| parent | cd514aeb996e2f7aefbe1f78481965d9d074aed4 (diff) | |
| parent | f68ab43de67f59925542efb6bcec30f4a84fe695 (diff) | |
Merge branch 'master' into next
Conflicts:
board/esd/plu405/plu405.c
drivers/rtc/ftrtc010.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'drivers/spi/atmel_dataflash_spi.c')
| -rw-r--r-- | drivers/spi/atmel_dataflash_spi.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c index 614965c3674..3a648e61902 100644 --- a/drivers/spi/atmel_dataflash_spi.c +++ b/drivers/spi/atmel_dataflash_spi.c @@ -30,7 +30,8 @@ #include <dataflash.h> #define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ -#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 0: NPCS0%1101 */ +#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 1: NPCS1%1101 */ +#define AT91_SPI_PCS2_DATAFLASH_CARD 0xB /* Chip Select 2: NPCS2%1011 */ #define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ void AT91F_SpiInit(void) @@ -57,7 +58,14 @@ void AT91F_SpiInit(void) ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), AT91_BASE_SPI + AT91_SPI_CSR(1)); #endif - +#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2 + /* Configure CS2 */ + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(2)); +#endif #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 /* Configure CS3 */ writel(AT91_SPI_NCPHA | @@ -99,6 +107,12 @@ void AT91F_SpiEnable(int cs) writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS), AT91_BASE_SPI + AT91_SPI_MR); break; + case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */ + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); + break; case 3: mode = readl(AT91_BASE_SPI + AT91_SPI_MR); mode &= 0xFFF0FFFF; |