diff options
| author | Thomas Chou <thomas@wytron.com.tw> | 2014-08-25 16:50:14 +0800 |
|---|---|---|
| committer | Thomas Chou <thomas@wytron.com.tw> | 2014-08-30 17:48:43 +0800 |
| commit | 8645071006a0b577ae4660f4a271f42c081ef4ab (patch) | |
| tree | 2fc4bd555b665626099489dc77dd2dadaaa11001 /drivers/serial/altera_uart.c | |
| parent | ef3cc8112c7ac58d621246523e8c84bf6035b53b (diff) | |
nios2: divide nios2-io.h into each specific drivers and remove it
The nios2-io.h defines hardware registers and bits of several FPGA
IP cores. It could be divided in to the specific drivers, including
altera timer, altera sysid, altera uart and altera jtag uart. The
altera pio and altera spi drivers use their own hardware definitions.
The removal of nios2-io.h will help modularity and maintenance.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Diffstat (limited to 'drivers/serial/altera_uart.c')
| -rw-r--r-- | drivers/serial/altera_uart.c | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index d620528e3e..d6b14844d6 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -9,10 +9,47 @@ #include <common.h> #include <watchdog.h> #include <asm/io.h> -#include <nios2-io.h> #include <linux/compiler.h> #include <serial.h> +typedef volatile struct { + unsigned rxdata; /* Rx data reg */ + unsigned txdata; /* Tx data reg */ + unsigned status; /* Status reg */ + unsigned control; /* Control reg */ + unsigned divisor; /* Baud rate divisor reg */ + unsigned endofpacket; /* End-of-packet reg */ +} nios_uart_t; + +/* status register */ +#define NIOS_UART_PE (1 << 0) /* parity error */ +#define NIOS_UART_FE (1 << 1) /* frame error */ +#define NIOS_UART_BRK (1 << 2) /* break detect */ +#define NIOS_UART_ROE (1 << 3) /* rx overrun */ +#define NIOS_UART_TOE (1 << 4) /* tx overrun */ +#define NIOS_UART_TMT (1 << 5) /* tx empty */ +#define NIOS_UART_TRDY (1 << 6) /* tx ready */ +#define NIOS_UART_RRDY (1 << 7) /* rx ready */ +#define NIOS_UART_E (1 << 8) /* exception */ +#define NIOS_UART_DCTS (1 << 10) /* cts change */ +#define NIOS_UART_CTS (1 << 11) /* cts */ +#define NIOS_UART_EOP (1 << 12) /* eop detected */ + +/* control register */ +#define NIOS_UART_IPE (1 << 0) /* parity error int ena*/ +#define NIOS_UART_IFE (1 << 1) /* frame error int ena */ +#define NIOS_UART_IBRK (1 << 2) /* break detect int ena */ +#define NIOS_UART_IROE (1 << 3) /* rx overrun int ena */ +#define NIOS_UART_ITOE (1 << 4) /* tx overrun int ena */ +#define NIOS_UART_ITMT (1 << 5) /* tx empty int ena */ +#define NIOS_UART_ITRDY (1 << 6) /* tx ready int ena */ +#define NIOS_UART_IRRDY (1 << 7) /* rx ready int ena */ +#define NIOS_UART_IE (1 << 8) /* exception int ena */ +#define NIOS_UART_TBRK (1 << 9) /* transmit break */ +#define NIOS_UART_IDCTS (1 << 10) /* cts change int ena */ +#define NIOS_UART_RTS (1 << 11) /* rts */ +#define NIOS_UART_IEOP (1 << 12) /* eop detected int ena */ + DECLARE_GLOBAL_DATA_PTR; /*------------------------------------------------------------------ |