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| author | Santhosh Kumar K <s-k6@ti.com> | 2024-02-14 16:27:47 +0530 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-03-21 14:26:33 +0000 |
| commit | 48d4730f84d6ef7933838c616c144f7c12ab2287 (patch) | |
| tree | 3940f77bf38582d2e0f61118ca8f54cb01773b62 /drivers/ram/stm32_sdram.c | |
| parent | a410d435a054851c94ebdfe2815f2ea90a4d949a (diff) | |
ram: k3-ddrss: Enable ECC interrupts
Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Diffstat (limited to 'drivers/ram/stm32_sdram.c')
0 files changed, 0 insertions, 0 deletions