diff options
author | Dave Gerlach <d-gerlach@ti.com> | 2021-05-11 10:22:09 -0500 |
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committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-05-12 16:30:52 +0530 |
commit | 67124b9a74fca735beefea147bd4177acaa1661a (patch) | |
tree | 345b23dc43d3c2d81ccc33d063a9354b8a8e1025 /drivers/ram/k3-ddrss/cps_drv_lpddr4.h | |
parent | 036f0c0b668afa85c001d73f3bffd9e17dce3bca (diff) |
ram: k3-j721e: Rename to k3-ddrss
Rename the k3-j721e folder under drivers/ram to k3-ddrss in preparation
of introducing additional support for other platforms to the same
driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Diffstat (limited to 'drivers/ram/k3-ddrss/cps_drv_lpddr4.h')
-rw-r--r-- | drivers/ram/k3-ddrss/cps_drv_lpddr4.h | 119 |
1 files changed, 119 insertions, 0 deletions
diff --git a/drivers/ram/k3-ddrss/cps_drv_lpddr4.h b/drivers/ram/k3-ddrss/cps_drv_lpddr4.h new file mode 100644 index 0000000000..706a5cde01 --- /dev/null +++ b/drivers/ram/k3-ddrss/cps_drv_lpddr4.h @@ -0,0 +1,119 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/****************************************************************************** + * + * Copyright (C) 2017-2018 Cadence Design Systems, Inc. + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * + * cps_drv_lpddr4.h + * Interface for the Register Accaess Layer of Cadence Platform Service (CPS) + ***************************************************************************** + */ + +#ifndef CPS_DRV_H_ +#define CPS_DRV_H_ + +#include <stddef.h> +#include <inttypes.h> +#include <asm/io.h> + +/** + * \brief Read a 32-bit value from memory. + * \param reg address of the memory mapped hardware register + * \return the value at the given address + */ +#define CPS_REG_READ(reg) (readl((volatile uint32_t*)(reg))) + +/** + * \brief Write a 32-bit address value to memory. + * \param reg address of the memory mapped hardware register + * \param value unsigned 32-bit value to write + */ +#define CPS_REG_WRITE(reg, value) (writel((uint32_t)(value), (volatile uint32_t*)(reg))) + +/** + * \brief Subtitue the value of fld macro and concatinate with required string + * \param fld field name + */ +#define CPS_FLD_MASK(fld) (fld ## _MASK) +#define CPS_FLD_SHIFT(fld) (fld ## _SHIFT) +#define CPS_FLD_WIDTH(fld) (fld ## _WIDTH) +#define CPS_FLD_WOCLR(fld) (fld ## _WOCLR) +#define CPS_FLD_WOSET(fld) (fld ## _WOSET) + +/** + * \brief Read a value of bit-field from the register value. + * \param reg register name + * \param fld field name + * \param reg_value register value + * \return bit-field value + */ +#define CPS_FLD_READ(fld, reg_value) (cps_fldread((uint32_t)(CPS_FLD_MASK(fld)), \ + (uint32_t)(CPS_FLD_SHIFT(fld)), \ + (uint32_t)(reg_value))) + +/** + * \brief Write a value of the bit-field into the register value. + * \param reg register name + * \param fld field name + * \param reg_value register value + * \param value value to be written to bit-field + * \return modified register value + */ +#define CPS_FLD_WRITE(fld, reg_value, value) (cps_fldwrite((uint32_t)(CPS_FLD_MASK(fld)), \ + (uint32_t)(CPS_FLD_SHIFT(fld)), \ + (uint32_t)(reg_value), (uint32_t)(value))) + +/** + * \brief Set bit within the register value. + * \param reg register name + * \param fld field name + * \param reg_value register value + * \return modified register value + */ +#define CPS_FLD_SET(fld, reg_value) (cps_fldset((uint32_t)(CPS_FLD_WIDTH(fld)), \ + (uint32_t)(CPS_FLD_MASK(fld)), \ + (uint32_t)(CPS_FLD_WOCLR(fld)), \ + (uint32_t)(reg_value))) + +static inline uint32_t cps_fldread(uint32_t mask, uint32_t shift, uint32_t reg_value) +{ + uint32_t result = (reg_value & mask) >> shift; + + return (result); +} + +/** + * \brief Write a value of the bit-field into the register value. + * \param mask mask for the bit-field + * \param shift bit-field shift from LSB + * \param reg_value register value + * \param value value to be written to bit-field + * \return modified register value + */ +static inline uint32_t cps_fldwrite(uint32_t mask, uint32_t shift, uint32_t reg_value, uint32_t value) +{ + uint32_t new_value = (value << shift) & mask; + + new_value = (reg_value & ~mask) | new_value; + return (new_value); +} + +/** + * \brief Set bit within the register value. + * \param width width of the bit-field + * \param mask mask for the bit-field + * \param is_woclr is bit-field has 'write one to clear' flag set + * \param reg_value register value + * \return modified register value + */ +static inline uint32_t cps_fldset(uint32_t width, uint32_t mask, uint32_t is_woclr, uint32_t reg_value) +{ + uint32_t new_value = reg_value; + /* Confirm the field to be bit and not write to clear type */ + if ((width == 1U) && (is_woclr == 0U)) { + new_value |= mask; + } + + return (new_value); +} +#endif /* CPS_DRV_H_ */ |