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authorSimon Glass <sjg@chromium.org>2012-12-13 20:48:44 +0000
committerTom Rini <trini@ti.com>2013-02-01 15:42:45 -0500
commit1206c18403ff25814673a4dbfa071ae06bbefaef (patch)
treea4a38c741e9b7a2cb98566785093c3984ec15454 /drivers/qe
parent6cb49c13f687fb8c1e2936466edf154f4132abb1 (diff)
ppc: Move brg_clk to arch_global_data
Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/qe')
-rw-r--r--drivers/qe/fdt.c4
-rw-r--r--drivers/qe/qe.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 73e9060d572..1a123b8ce59 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -77,13 +77,13 @@ void ft_qe_setup(void *blob)
do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
"bus-frequency", gd->qe_clk, 1);
do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
- "brg-frequency", gd->brg_clk, 1);
+ "brg-frequency", gd->arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
"clock-frequency", gd->qe_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
"bus-frequency", gd->qe_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
- "brg-frequency", gd->brg_clk, 1);
+ "brg-frequency", gd->arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
"clock-frequency", gd->qe_clk / 2, 1);
fdt_fixup_qe_firmware(blob);
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 345587be63e..72c585cffef 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -220,7 +220,7 @@ void qe_assign_page(uint snum, uint para_ram_base)
from CLKn pin, we have te change the function.
*/
-#define BRG_CLK (gd->brg_clk)
+#define BRG_CLK (gd->arch.brg_clk)
int qe_set_brg(uint brg, uint rate)
{