diff options
author | Stephen Warren <swarren@nvidia.com> | 2016-08-08 11:28:26 -0600 |
---|---|---|
committer | Tom Warren <twarren@nvidia.com> | 2016-08-15 10:26:13 -0700 |
commit | 24cdf1a9be484e234ebcceaf94fa551550b29ebd (patch) | |
tree | cb5528192c1c5be12b4f506bc005562290e77776 /drivers/power/domain | |
parent | 4dd99d140cf061478d1ac9e0a961a3874b759f1d (diff) |
power domain: add Tegra186 driver
In Tegra186, SoC power domains are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'drivers/power/domain')
-rw-r--r-- | drivers/power/domain/Kconfig | 7 | ||||
-rw-r--r-- | drivers/power/domain/Makefile | 1 | ||||
-rw-r--r-- | drivers/power/domain/tegra186-power-domain.c | 92 |
3 files changed, 100 insertions, 0 deletions
diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig index b9040974339..132e33250e8 100644 --- a/drivers/power/domain/Kconfig +++ b/drivers/power/domain/Kconfig @@ -17,4 +17,11 @@ config SANDBOX_POWER_DOMAIN simply accepts requests to power on/off various HW modules without actually doing anything beyond a little error checking. +config TEGRA186_POWER_DOMAIN + bool "Enable Tegra186 BPMP-based power domain driver" + depends on TEGRA186_BPMP + help + Enable support for manipulating Tegra's on-SoC power domains via IPC + requests to the BPMP (Boot and Power Management Processor). + endmenu diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile index c18292f0ec8..2c3d92638fb 100644 --- a/drivers/power/domain/Makefile +++ b/drivers/power/domain/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_POWER_DOMAIN) += power-domain-uclass.o obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o +obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o diff --git a/drivers/power/domain/tegra186-power-domain.c b/drivers/power/domain/tegra186-power-domain.c new file mode 100644 index 00000000000..41d84de83e1 --- /dev/null +++ b/drivers/power/domain/tegra186-power-domain.c @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <misc.h> +#include <power-domain-uclass.h> +#include <asm/arch-tegra/bpmp_abi.h> + +#define UPDATE BIT(0) +#define ON BIT(1) + +static int tegra186_power_domain_request(struct power_domain *power_domain) +{ + debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return 0; +} + +static int tegra186_power_domain_free(struct power_domain *power_domain) +{ + debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return 0; +} + +static int tegra186_power_domain_common(struct power_domain *power_domain, + bool on) +{ + struct mrq_pg_update_state_request req; + int on_state = on ? ON : 0; + int ret; + + req.partition_id = power_domain->id; + req.logic_state = UPDATE | on_state; + req.sram_state = UPDATE | on_state; + /* + * Drivers manage their own clocks so they don't get out of sync, and + * since some power domains have many clocks, only a subset of which + * are actually needed depending on use-case. + */ + req.clock_state = UPDATE; + + ret = misc_call(power_domain->dev->parent, MRQ_PG_UPDATE_STATE, &req, + sizeof(req), NULL, 0); + if (ret < 0) + return ret; + + return 0; +} + +static int tegra186_power_domain_on(struct power_domain *power_domain) +{ + debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return tegra186_power_domain_common(power_domain, true); +} + +static int tegra186_power_domain_off(struct power_domain *power_domain) +{ + debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, + power_domain, power_domain->dev, power_domain->id); + + return tegra186_power_domain_common(power_domain, false); +} + +struct power_domain_ops tegra186_power_domain_ops = { + .request = tegra186_power_domain_request, + .free = tegra186_power_domain_free, + .on = tegra186_power_domain_on, + .off = tegra186_power_domain_off, +}; + +static int tegra186_power_domain_probe(struct udevice *dev) +{ + debug("%s(dev=%p)\n", __func__, dev); + + return 0; +} + +U_BOOT_DRIVER(tegra186_power_domain) = { + .name = "tegra186_power_domain", + .id = UCLASS_POWER_DOMAIN, + .probe = tegra186_power_domain_probe, + .ops = &tegra186_power_domain_ops, +}; |