diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-09-17 03:32:58 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-09-18 23:10:11 +0900 |
commit | bbb119800f5ce8a291d707fd1a8e753959a93fd1 (patch) | |
tree | 1dbbd803c23aa81aa1d9214e0d20730bcab04e80 /drivers/pinctrl/uniphier/pinctrl-uniphier.h | |
parent | f6bbec3d5c12457e2ce207f662e65e7da70254ce (diff) |
pinctrl: uniphier: support 4bit-width pin-mux register capability
On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit
wide on sLD3 SoC. Support it for the sLD3 pinctrl driver.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier.h')
-rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h index 76ea1bef12b..5c3db2ab605 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -67,8 +67,9 @@ struct uniphier_pinctrl_socdata { const char * const *functions; int functions_count; unsigned caps; -#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1) -#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0) +#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(2) +#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(1) +#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0) }; #define UNIPHIER_PINCTRL_PIN(a, b) \ |