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authorBin Meng <bmeng.cn@gmail.com>2015-07-19 00:20:03 +0800
committerSimon Glass <sjg@chromium.org>2015-07-28 10:36:23 -0600
commit95f3aa209acde88f4273403733a0fb29ca28260d (patch)
tree5617e61011f18df418a2c49e2935bcaad49b0c70 /drivers/pci
parent7e378b8bfce342d773621af394ca192dba39cf34 (diff)
dm: pci: Correct primary/secondary/subordinate bus number assignment
In driver model, each pci bridge device has its own hose structure. hose->first_busno points to the bridge device's device number, so we should not substract hose->first_busno before programming the bridge device's primary/secondary/subordinate bus number registers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci_auto.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index e034ed1715..ef6dc4facb 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -224,10 +224,15 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
/* Configure bus number registers */
+#ifdef CONFIG_DM_PCI
+ pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
+ pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
+#else
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
PCI_BUS(dev) - hose->first_busno);
pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,
sub_bus - hose->first_busno);
+#endif
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
@@ -295,8 +300,12 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
struct pci_region *pci_io = hose->pci_io;
/* Configure bus number registers */
+#ifdef CONFIG_DM_PCI
+ pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, sub_bus);
+#else
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS,
sub_bus - hose->first_busno);
+#endif
if (pci_mem) {
/* Round memory allocator to 1MB boundary */