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authorBin Meng <bmeng.cn@gmail.com>2015-08-20 06:40:23 -0700
committerSimon Glass <sjg@chromium.org>2015-08-26 07:54:12 -0700
commit348b744b7c6528c0509e2a0b0740be3ce949497f (patch)
tree326700443e4e7bcc4af4e03db5643bc5e6b4377e /drivers/pci
parentfa6af7b4e00cd06138375999d04dd2cd6a515664 (diff)
x86: fsp: Call fsp_init_phase_pci() in pci_uclass_post_probe()
Per Intel FSP specification, we should call FSP notify API to inform FSP that PCI enumeration has been done so that FSP will do any necessary initialization as required by the chipset's BIOS Writer's Guide (BWG). Unfortunately we have to put this call here as with driver model, the enumeration is all done on a lazy basis as needed, so until something is touched on PCI it won't happen. Note we only call this after U-Boot is relocated and root bus has finished probing. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci-uclass.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 416027438f..c90e7ac8dd 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -14,6 +14,9 @@
#include <dm/lists.h>
#include <dm/root.h>
#include <dm/device-internal.h>
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+#include <asm/fsp/fsp_support.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -749,6 +752,24 @@ static int pci_uclass_post_probe(struct udevice *bus)
ret = pci_auto_config_devices(bus);
#endif
+#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
+ /*
+ * Per Intel FSP specification, we should call FSP notify API to
+ * inform FSP that PCI enumeration has been done so that FSP will
+ * do any necessary initialization as required by the chipset's
+ * BIOS Writer's Guide (BWG).
+ *
+ * Unfortunately we have to put this call here as with driver model,
+ * the enumeration is all done on a lazy basis as needed, so until
+ * something is touched on PCI it won't happen.
+ *
+ * Note we only call this 1) after U-Boot is relocated, and 2)
+ * root bus has finished probing.
+ */
+ if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0))
+ ret = fsp_init_phase_pci();
+#endif
+
return ret < 0 ? ret : 0;
}