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| author | Matt Ranostay <mranostay@ti.com> | 2022-06-08 06:14:15 -0700 |
|---|---|---|
| committer | Anand Gadiyar <gadiyar@ti.com> | 2022-06-12 18:51:08 -0500 |
| commit | ad3d63b199fd48ab2fb6ca8069a11b40faa378d5 (patch) | |
| tree | 70defac15306282537e7a74ff5906543a21e6caf /drivers/pci/pcie_phytium.c | |
| parent | 23e98f546fec3c1c05753fca9360b65f0054435a (diff) | |
spl: Add support for enabling d-cache in board_init_r
This patchset reimplements part of the dropped patchset bd236384ceef
which enables d-cache during SPL execution.
Having the d-cache disabled created a regression that added additional
250 milliseconds to A72 SPL boot time on the J721E platform.
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Diffstat (limited to 'drivers/pci/pcie_phytium.c')
0 files changed, 0 insertions, 0 deletions