diff options
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2021-03-11 15:30:51 +0800 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2021-03-23 18:06:07 +0530 |
| commit | ae5cbc43b361cc78040aa4fbb1cacd375eb2db04 (patch) | |
| tree | cc04f2be94ce044a504314cc512f1e683bbe464b /drivers/pci/pcie_layerscape_rc.c | |
| parent | a7c532f94c49ee9373ccd1f4e3601f5e828eccd5 (diff) | |
pci: layerscape: Change to allocate zeroed memery for struct ls_pcie
As on some incipient Layerscape platforms (LS1043A series) there isn't
separate PF control register block, these registers reside in the LUT
register block, so when the driver detected there isn't 'ctrl', it will
assign the 'lut' address to the ls_pcie->ctrl.
The current code allocate memory for the struct ls_pcie with random
contents, this can result in skipping to assign the ls_pcie->ctrl with
the 'lut' address, then further crash with the incorrect address.
Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers/pci/pcie_layerscape_rc.c')
| -rw-r--r-- | drivers/pci/pcie_layerscape_rc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c index b055ed5165..bd2c19f7f0 100644 --- a/drivers/pci/pcie_layerscape_rc.c +++ b/drivers/pci/pcie_layerscape_rc.c @@ -254,7 +254,7 @@ static int ls_pcie_probe(struct udevice *dev) pcie_rc->bus = dev; - pcie = devm_kmalloc(dev, sizeof(*pcie), GFP_KERNEL); + pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); if (!pcie) return -ENOMEM; |