diff options
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2021-11-09 16:56:24 +0530 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2021-11-09 17:18:23 +0530 |
| commit | be3841603467b42d90010d164cb7e2744f61e06d (patch) | |
| tree | a0ad81a893874100c8f6af601175b9f5b5d4995a /drivers/pci/pcie_layerscape_gen4_fixup.c | |
| parent | a97a071d10d2b2d49b86f92481f766ed30f6a5ed (diff) | |
pci: layerscape: Fix the LUT and msi-map mismatch issue
In the current code, it doesn't reset the cursors of LUT entry and
StreamID at the beginning of the fixup, so it can result in LUT entry
setup and msi-map mismatch and LUT entries and StreamID leaking
when reload and fixup the DTB.
This patch move the initialization of LUT entry and StreamID cursors
to the beginning of the fixup to resolve the issues.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers/pci/pcie_layerscape_gen4_fixup.c')
| -rw-r--r-- | drivers/pci/pcie_layerscape_gen4_fixup.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index e9ee15558e..7d11234106 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ OR X11 /* - * Copyright 2018-2020 NXP + * Copyright 2018-2021 NXP * * PCIe Gen4 driver for NXP Layerscape SoCs * Author: Hou Zhiqiang <Minder.Hou@gmail.com> @@ -223,6 +223,9 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie) { ft_pcie_rc_layerscape_gen4_fix(blob, pcie); ft_pcie_ep_layerscape_gen4_fix(blob, pcie); + + pcie->stream_id_cur = 0; + pcie->next_lut_index = 0; } /* Fixup Kernel DT for PCIe */ |