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authorTom Rini <trini@konsulko.com>2022-01-25 08:01:43 -0500
committerTom Rini <trini@konsulko.com>2022-01-25 08:01:43 -0500
commit6146cd62aedc4849fec66f10ab0aa57f1dc64b8e (patch)
tree7b4ea9a0c4251507b988a0f4d1584c3cb8952394 /drivers/pci/pcie_iproc.c
parent21a1439d986a889cefbc2ed785c3f592fc9266de (diff)
parent54c5c2b8fee2f64d135349bc9764d068b647e4e0 (diff)
Merge branch '2022-01-24-assorted-updates'
- A number of cleanups to Python code based on running pylint - Integrate changes so that we can run "make pylint" and compare the results to a current baseline. Keep this as a manual check for now. - Improve functionality of moveconfig.py - pci: iproc: Set all 24 bits of PCI class code
Diffstat (limited to 'drivers/pci/pcie_iproc.c')
-rw-r--r--drivers/pci/pcie_iproc.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c
index a31e74a0f2e..85dfab5c720 100644
--- a/drivers/pci/pcie_iproc.c
+++ b/drivers/pci/pcie_iproc.c
@@ -1116,15 +1116,14 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie)
u32 link_status, class;
pcie->link_is_active = false;
- /* force class to PCI_CLASS_BRIDGE_PCI (0x0604) */
+ /* force class to PCI bridge Normal decode (0x060400) */
#define PCI_BRIDGE_CTRL_REG_OFFSET 0x43c
-#define PCI_CLASS_BRIDGE_MASK 0xffff00
-#define PCI_CLASS_BRIDGE_SHIFT 8
+#define PCI_BRIDGE_CTRL_REG_CLASS_MASK 0xffffff
iproc_pci_raw_config_read32(pcie, 0,
PCI_BRIDGE_CTRL_REG_OFFSET,
4, &class);
- class &= ~PCI_CLASS_BRIDGE_MASK;
- class |= (PCI_CLASS_BRIDGE_PCI << PCI_CLASS_BRIDGE_SHIFT);
+ class &= ~PCI_BRIDGE_CTRL_REG_CLASS_MASK;
+ class |= (PCI_CLASS_BRIDGE_PCI << 8);
iproc_pci_raw_config_write32(pcie, 0,
PCI_BRIDGE_CTRL_REG_OFFSET,
4, class);