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authorStefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>2017-01-17 16:27:24 +0100
committerMichal Simek <michal.simek@xilinx.com>2017-02-17 10:22:46 +0100
commita259243e9d5895e03348cad98b82524e61cd47e8 (patch)
tree56186173d41941656bd4e0339e166cb5d72efc65 /drivers/net/zynq_gem.c
parent85d0bea153c76f4a3912b5683222885bfd37c769 (diff)
net: zynq: Don't overwrite gem_rclk_ctrl with default value
The gem[0-1]_rclk_ctrl registers control the source of the rx clock, control and data signals and configure via ps7_init function. Don't overwrite the register with the default value. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/net/zynq_gem.c')
-rw-r--r--drivers/net/zynq_gem.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 86dd03fedaf..d3c33e801d6 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -175,7 +175,6 @@ struct zynq_gem_priv {
u32 rxbd_current;
u32 rx_first_buf;
int phyaddr;
- u32 emio;
int init;
struct zynq_gem_regs *iobase;
phy_interface_t interface;
@@ -457,15 +456,13 @@ static int zynq_gem_init(struct udevice *dev)
break;
}
- /* Change the rclk and clk only not using EMIO interface */
- if (!priv->emio)
#ifndef CONFIG_CLK_ZYNQMP
- zynq_slcr_gem_clk_setup((ulong)priv->iobase !=
- ZYNQ_GEM_BASEADDR0, clk_rate);
+ zynq_slcr_gem_clk_setup((ulong)priv->iobase !=
+ ZYNQ_GEM_BASEADDR0, clk_rate);
#else
- ret = clk_set_rate(&priv->clk, clk_rate);
- if (IS_ERR_VALUE(ret))
- return -1;
+ ret = clk_set_rate(&priv->clk, clk_rate);
+ if (IS_ERR_VALUE(ret))
+ return -1;
#endif
setbits_le32(&regs->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK |
@@ -690,7 +687,6 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
pdata->iobase = (phys_addr_t)dev_get_addr(dev);
priv->iobase = (struct zynq_gem_regs *)pdata->iobase;
/* Hardcode for now */
- priv->emio = 0;
priv->phyaddr = -1;
priv->phy_of_handle = fdtdec_lookup_phandle(gd->fdt_blob, node,
@@ -708,8 +704,6 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
}
priv->interface = pdata->phy_interface;
- priv->emio = fdtdec_get_bool(gd->fdt_blob, node, "xlnx,emio");
-
printf("ZYNQ GEM: %lx, phyaddr %x, interface %s\n", (ulong)priv->iobase,
priv->phyaddr, phy_string_for_interface(priv->interface));