diff options
| author | Wu, Josh <Josh.wu@atmel.com> | 2015-06-03 16:45:44 +0800 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2015-08-11 13:27:15 -0500 |
| commit | ade4ea4d71f6dad6683087621eb27bbcdfa6871d (patch) | |
| tree | 64619fbef7e44080f05dafe55f93ae278708e39e /drivers/net/macb.h | |
| parent | 90712741c9f03c4fddc5d71f4c397d5e18f94a3d (diff) | |
net: macb: add gmac multi-queue support
This patch refer to linux kernel commit: d8b763e1e79f
net/macb: add TX multiqueue support for gem
by: Cyrille Pitchen
1. macb driver will check the register to find how many queues support for
this chip.
2. Then as we only use queue0 for tx, so we will set up all other queues
use a dummy descriptor, which USED bit is set. So those queues are not used.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers/net/macb.h')
| -rw-r--r-- | drivers/net/macb.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/macb.h b/drivers/net/macb.h index 06f7c66dfd..5bb48f449c 100644 --- a/drivers/net/macb.h +++ b/drivers/net/macb.h @@ -60,6 +60,13 @@ /* GEM specific register offsets */ #define GEM_DCFG1 0x0280 +#define GEM_DCFG6 0x0294 + +#define MACB_MAX_QUEUES 8 + +/* GEM specific multi queues register offset */ +/* hw_q can be 0~7 */ +#define GEM_TBQP(hw_q) (0x0440 + ((hw_q) << 2)) /* Bitfields in NCR */ #define MACB_LB_OFFSET 0 @@ -309,5 +316,7 @@ readl((port)->regs + GEM_##reg) #define gem_writel(port, reg, value) \ writel((value), (port)->regs + GEM_##reg) +#define gem_writel_queue_TBQP(port, value, queue_num) \ + writel((value), (port)->regs + GEM_TBQP(queue_num)) #endif /* __DRIVERS_MACB_H__ */ |