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authorYe Li <ye.li@nxp.com>2020-05-04 22:09:01 +0800
committerStefano Babic <sbabic@denx.de>2020-05-10 20:55:20 +0200
commita59691280dacae478183c95a93c5f00f4717d49c (patch)
tree679b57dcad8009a8f353514a3e113c666b1b1b5b /drivers/mtd
parent39320e7256412ed4b6eee9fc09f7d30f0e4ddee4 (diff)
MXS_NAND: Add clock support for iMX8
Since iMX8 has enabled clock uclass, we can parse the clocks from DTB and enable them in GPMI driver. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/raw/mxs_nand_dt.c69
1 files changed, 69 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/mxs_nand_dt.c b/drivers/mtd/nand/raw/mxs_nand_dt.c
index c4dc0bb1dd..43dbe9e66e 100644
--- a/drivers/mtd/nand/raw/mxs_nand_dt.c
+++ b/drivers/mtd/nand/raw/mxs_nand_dt.c
@@ -2,6 +2,8 @@
* NXP GPMI NAND flash driver (DT initialization)
*
* Copyright (C) 2018 Toradex
+ * Copyright 2019 NXP
+ *
* Authors:
* Stefan Agner <stefan.agner@toradex.com>
*
@@ -14,6 +16,7 @@
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/printk.h>
+#include <clk.h>
#include <mxs_nand.h>
@@ -91,6 +94,72 @@ static int mxs_nand_dt_probe(struct udevice *dev)
info->legacy_bch_geometry = dev_read_bool(dev, "fsl,legacy-bch-geometry");
+ if (IS_ENABLED(CONFIG_CLK) && IS_ENABLED(CONFIG_IMX8)) {
+ /* Assigned clock already set clock */
+ struct clk gpmi_clk;
+
+ ret = clk_get_by_name(dev, "gpmi_io", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi io clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi io clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "gpmi_apb", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_apb clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_apb clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "gpmi_bch", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "gpmi_apb_bch", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_apb_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_apb_bch clk: %d\n", ret);
+ return ret;
+ }
+
+ /* this clock is used for apbh_dma, since the apbh dma does not support DM,
+ * we optionally enable it here
+ */
+ ret = clk_get_by_name(dev, "gpmi_apbh_dma", &gpmi_clk);
+ if (ret < 0) {
+ debug("Can't get gpmi_apbh_dma clk: %d\n", ret);
+ } else {
+ ret = clk_enable(&gpmi_clk);
+ if (ret < 0) {
+ debug("Can't enable gpmi_apbh_dma clk: %d\n", ret);
+ }
+ }
+ }
+
return mxs_nand_init_ctrl(info);
}