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authorVaishnav Achath <vaishnav.a@ti.com>2023-07-11 19:43:00 +0530
committerUdit Kumar <u-kumar1@ti.com>2023-07-11 20:10:43 +0530
commit11ca97f7108b5e9d0e54c96974282c23a4da963e (patch)
tree0ff4a2c21109625c43be34017334a1b7126b344b /drivers/mtd/spi
parent919996609e8fb638fd103ca49c8d679e74a95101 (diff)
mtd: spi-nor-core: Fixup SNOR_F_IO_MODE_EN_VOLATILE for MT35X
MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table in SFDP. Commit bebdc237507c (" mtd: spi-nor: Parse SFDP SCCR Map") added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device supports octal DTR mode, add this property in SFDP fixup. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Diffstat (limited to 'drivers/mtd/spi')
-rw-r--r--drivers/mtd/spi/spi-nor-core.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 232a0ac3a9..03bf3f0bdd 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3698,6 +3698,12 @@ static void mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor,
params->rdsr_addr_nbytes = 0;
/*
+ * SCCR Map 22nd DWORD does not indicate DTR Octal Mode Enable
+ * for MT35XU512ABA but is actually supported by device.
+ */
+ nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;
+
+ /*
* The BFPT quad enable field is set to a reserved value so the quad
* enable function is ignored by spi_nor_parse_bfpt(). Make sure we
* disable it.