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authorJagannadha Sutradharudu Teki <jaganna@xilinx.com>2013-06-19 15:31:23 +0530
committerJagannadha Sutradharudu Teki <jaganna@xilinx.com>2013-06-23 22:02:49 +0530
commitcf6b11dcda2f13d1c05c2f20e2a1735a833a41fe (patch)
tree8ce3b5596e77ff5e66ead1bbd175398b07bd146a /drivers/mtd/spi
parentc9fcb59d7db74b93df9ee0a830bb9f43888f195c (diff)
sf: Discover the bank addr commands
Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Diffstat (limited to 'drivers/mtd/spi')
-rw-r--r--drivers/mtd/spi/spi_flash.c21
-rw-r--r--drivers/mtd/spi/spi_flash_internal.h14
2 files changed, 35 insertions, 0 deletions
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 9ddd070872..7e19953b0a 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -304,6 +304,27 @@ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
return 0;
}
+int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
+{
+ /* discover bank cmds */
+ switch (idcode0) {
+ case SPI_FLASH_SPANSION_IDCODE0:
+ flash->bank_read_cmd = CMD_BANKADDR_BRRD;
+ flash->bank_write_cmd = CMD_BANKADDR_BRWR;
+ break;
+ case SPI_FLASH_STMICRO_IDCODE0:
+ case SPI_FLASH_WINBOND_IDCODE0:
+ flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
+ flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
+ break;
+ default:
+ printf("SF: Unsupported bank commands %02x\n", idcode0);
+ return -1;
+ }
+
+ return 0;
+}
+
#ifdef CONFIG_OF_CONTROL
int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
{
diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h
index 772fef622d..db6c4448c4 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -28,6 +28,17 @@
#define CMD_ERASE_64K 0xd8
#define CMD_ERASE_CHIP 0xc7
+/* Manufacture ID's */
+#define SPI_FLASH_SPANSION_IDCODE0 0x01
+#define SPI_FLASH_STMICRO_IDCODE0 0x20
+#define SPI_FLASH_WINBOND_IDCODE0 0xef
+
+/* Bank addr access commands */
+#define CMD_BANKADDR_BRWR 0x17
+#define CMD_BANKADDR_BRRD 0x16
+#define CMD_EXTNADDR_WREAR 0xC5
+#define CMD_EXTNADDR_RDEAR 0xC8
+
/* Common status */
#define STATUS_WIP 0x01
@@ -80,6 +91,9 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
/* Program the bank address register */
int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
+/* Configure the BAR - discover the bank cmds */
+int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0);
+
/*
* Same as spi_flash_cmd_read() except it also claims/releases the SPI
* bus. Used as common part of the ->read() operation.