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authorJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>2014-12-12 19:36:14 +0530
committerSimon Glass <sjg@chromium.org>2014-12-13 15:08:04 -0700
commit54ba653ab63b31c8f5405fb0ee9dfba05cbb1521 (patch)
treef25ee08062a2b629296e8bb19ae0461dc7493c76 /drivers/mtd/spi/sf_internal.h
parent74c2cee4e82bb71953267e87900e279ab5aa1dc3 (diff)
sf: Enable byte program support
Enabled byte program support for sst flashes in sf. Few controllers will only support BP, so this patch gives a tx transfer flag to set the BP so-that sf will operate on byte program transfer. A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI controller to use byte program op for SST flash. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/mtd/spi/sf_internal.h')
-rw-r--r--drivers/mtd/spi/sf_internal.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index fb53cb0834..785f7a96fe 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -40,10 +40,13 @@ enum {
SECT_4K = 1 << 0,
SECT_32K = 1 << 1,
E_FSR = 1 << 2,
- WR_QPP = 1 << 3,
+ SST_BP = 1 << 3,
SST_WP = 1 << 4,
+ WR_QPP = 1 << 5,
};
+#define SST_WR (SST_BP | SST_WP)
+
#define SPI_FLASH_3B_ADDR_LEN 3
#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
#define SPI_FLASH_16MB_BOUN 0x1000000