diff options
| author | Stephen Warren <swarren@nvidia.com> | 2016-09-13 10:45:44 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-09-27 09:11:01 -0700 |
| commit | 6b83588eea77c6fe69c11ba9e5eb2df071b1dadc (patch) | |
| tree | ea531251ee29b1d93686754252c1f33e5355caee /drivers/mmc | |
| parent | 67748a73b14b239283bc1ace7564a124b714b75e (diff) | |
mmc: tegra: move pad_init_mmc() into MMC driver
pad_init_mmc() is performing an SoC-specific operation, using registers
within the MMC controller. There's no reason to implement this code
outside the MMC driver, so move it inside the driver.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/tegra_mmc.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 08b4bd4824..5e6cfe710a 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -448,6 +448,34 @@ static void tegra_mmc_set_ios(struct mmc *mmc) debug("mmc_set_ios: hostctl = %08X\n", ctrl); } +static void pad_init_mmc(struct mmc_host *host) +{ +#if defined(CONFIG_TEGRA30) + enum periph_id id = host->mmc_id; + u32 val; + + debug("%s: sdmmc address = %08x, id = %d\n", __func__, + (unsigned int)host->reg, id); + + /* Set the pad drive strength for SDMMC1 or 3 only */ + if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) { + debug("%s: settings are only valid for SDMMC1/SDMMC3!\n", + __func__); + return; + } + + val = readl(&host->reg->sdmemcmppadctl); + val &= 0xFFFFFFF0; + val |= MEMCOMP_PADCTRL_VREF; + writel(val, &host->reg->sdmemcmppadctl); + + val = readl(&host->reg->autocalcfg); + val &= 0xFFFF0000; + val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED; + writel(val, &host->reg->autocalcfg); +#endif +} + static void mmc_reset(struct mmc_host *host, struct mmc *mmc) { unsigned int timeout; |