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authorSimon Glass <sjg@chromium.org>2016-01-21 19:43:38 -0700
committerSimon Glass <sjg@chromium.org>2016-01-21 20:42:34 -0700
commit898d64395c6f8889fc9fd09a0a4dc6a6f018598f (patch)
tree8d4c42a6cf349f0e86671623e4db83956d7e4930 /drivers/mmc/rockchip_dw_mmc.c
parentf4adc9a50475e0c07ea5441e12e2f3caa54a76d3 (diff)
rockchip: Use a separate clock ID for clocks
At present we use the same peripheral ID for clocks and pinctrl. While this works it is probably better to use the device tree clock binding ID for clocks. We can use the clk_get_by_index() function to find this. Update the clock drivers and the code that uses them. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/mmc/rockchip_dw_mmc.c')
-rw-r--r--drivers/mmc/rockchip_dw_mmc.c13
1 files changed, 5 insertions, 8 deletions
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 080c831d56..cb9e1048d0 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct rockchip_dwmmc_priv {
struct udevice *clk;
- struct rk3288_grf *grf;
+ int periph;
struct dwmci_host host;
};
@@ -30,8 +30,7 @@ static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
int ret;
- ret = clk_set_periph_rate(priv->clk, PERIPH_ID_SDMMC0 + host->dev_index,
- freq);
+ ret = clk_set_periph_rate(priv->clk, priv->periph, freq);
if (ret < 0) {
debug("%s: err=%d\n", __func__, ret);
return ret;
@@ -71,12 +70,10 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
int ret;
int fifo_depth;
- priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
- if (IS_ERR(priv->grf))
- return PTR_ERR(priv->grf);
- ret = uclass_get_device(UCLASS_CLK, CLK_GENERAL, &priv->clk);
- if (ret)
+ ret = clk_get_by_index(dev, 0, &priv->clk);
+ if (ret < 0)
return ret;
+ priv->periph = ret;
if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
"clock-freq-min-max", minmax, 2))