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authorMasahiro Yamada <yamada.masahiro@socionext.com>2018-04-20 18:14:24 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2018-04-24 00:35:34 +0900
commit30b5d9aa9aee9853b6b51d93ddf16d762d20c538 (patch)
tree5961aa337e8a9ca3d61744b0e064b1b36327d417 /drivers/mmc/renesas-sdhi.c
parent58d702274c09c8dc45c14141acd2c70bb578c5b2 (diff)
mmc: tmio: move clk_enable() to each driver's probe function
I need to differentiate the clock handling for uniphier-sd. Move it to each driver's probe function from the tmio common code so that renesas-sdhi will not be affected. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/mmc/renesas-sdhi.c')
-rw-r--r--drivers/mmc/renesas-sdhi.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 56a43ca7d3..8e49b2f73c 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -330,8 +330,10 @@ static const struct udevice_id renesas_sdhi_match[] = {
static int renesas_sdhi_probe(struct udevice *dev)
{
+ struct tmio_sd_priv *priv = dev_get_priv(dev);
u32 quirks = dev_get_driver_data(dev);
struct fdt_resource reg_res;
+ struct clk clk;
DECLARE_GLOBAL_DATA_PTR;
int ret;
@@ -348,6 +350,27 @@ static int renesas_sdhi_probe(struct udevice *dev)
quirks |= TMIO_SD_CAP_16BIT;
}
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0) {
+ dev_err(dev, "failed to get host clock\n");
+ return ret;
+ }
+
+ /* set to max rate */
+ priv->mclk = clk_set_rate(&clk, ULONG_MAX);
+ if (IS_ERR_VALUE(priv->mclk)) {
+ dev_err(dev, "failed to set rate for host clock\n");
+ clk_free(&clk);
+ return priv->mclk;
+ }
+
+ ret = clk_enable(&clk);
+ clk_free(&clk);
+ if (ret) {
+ dev_err(dev, "failed to enable host clock\n");
+ return ret;
+ }
+
ret = tmio_sd_probe(dev, quirks);
#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
if (!ret)