diff options
| author | Simon Glass <sjg@chromium.org> | 2017-07-29 11:35:19 -0600 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2017-08-17 16:44:17 +0900 |
| commit | 446e077a21024edb3d8636a979a99abbcaec9846 (patch) | |
| tree | b3d358ccca450e4ac64d5b90770ab89e07f5f8af /drivers/mmc/fsl_esdhc.c | |
| parent | 9586aa6ea3958dc0dd608e41c27d79d66309ba12 (diff) | |
dm: mmc: fsl_esdhc: Detect reset failure
Since esdhc_reset() can fail it should return an error code. Update this
and also adjust the timeout mechanism to use get_timer(), which is a more
common approach.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/mmc/fsl_esdhc.c')
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 22 |
1 files changed, 15 insertions, 7 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index dd312d279c..1e1e92d740 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -698,18 +698,23 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) return timeout > 0; } -static void esdhc_reset(struct fsl_esdhc *regs) +static int esdhc_reset(struct fsl_esdhc *regs) { - unsigned long timeout = 100; /* wait max 100 ms */ + ulong start; /* reset the controller */ esdhc_setbits32(®s->sysctl, SYSCTL_RSTA); /* hardware clears the bit when it is done */ - while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout) - udelay(1000); - if (!timeout) - printf("MMC/SD: Reset never completed.\n"); + start = get_timer(0); + while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA)) { + if (get_timer(start) > 100) { + printf("MMC/SD: Reset never completed.\n"); + return -ETIMEDOUT; + } + } + + return 0; } static int esdhc_getcd(struct mmc *mmc) @@ -753,6 +758,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv) struct fsl_esdhc *regs; struct mmc *mmc; u32 caps, voltage_caps; + int ret; if (!priv) return -EINVAL; @@ -760,7 +766,9 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv) regs = priv->esdhc_regs; /* First reset the eSDHC controller */ - esdhc_reset(regs); + ret = esdhc_reset(regs); + if (ret) + return ret; #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN |