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authorPatrick Delaunay <patrick.delaunay@st.com>2018-07-09 15:17:20 +0200
committerTom Rini <trini@konsulko.com>2018-07-20 15:55:05 -0400
commitd090cbab64c893e6c6122e468282750aeeeae840 (patch)
treee7c763d35e75bcd7b5d82c6fce964924c8c51566 /drivers/misc
parenta674313c2cebfad8e168a2011027470a2e640983 (diff)
misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD RCC driver which is able to bind both clock and reset drivers. We can reuse and adapt RCC MFD driver already available for MCU SoCs (F4/F7/H7). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/Kconfig2
-rw-r--r--drivers/misc/stm32_rcc.c19
2 files changed, 16 insertions, 5 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 17b3a805a2..c031dfde9d 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -169,7 +169,7 @@ config STM32MP_FUSE
config STM32_RCC
bool "Enable RCC driver for the STM32 SoC's family"
- depends on STM32 && MISC
+ depends on (STM32 || ARCH_STM32MP) && MISC
help
Enable the STM32 RCC driver. The RCC block (Reset and Clock Control
block) is responsible of the management of the clock and reset
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
index 980b3a58e1..13d70696f6 100644
--- a/drivers/misc/stm32_rcc.c
+++ b/drivers/misc/stm32_rcc.c
@@ -30,6 +30,11 @@ struct stm32_rcc_clk stm32_rcc_clk_h7 = {
.drv_name = "stm32h7_rcc_clock",
};
+struct stm32_rcc_clk stm32_rcc_clk_mp1 = {
+ .drv_name = "stm32mp1_clk",
+ .soc = STM32MP1,
+};
+
static int stm32_rcc_bind(struct udevice *dev)
{
struct udevice *child;
@@ -39,7 +44,6 @@ static int stm32_rcc_bind(struct udevice *dev)
int ret;
debug("%s(dev=%p)\n", __func__, dev);
-
drv = lists_driver_lookup_name(rcc_clk->drv_name);
if (!drv) {
debug("Cannot find driver '%s'\n", rcc_clk->drv_name);
@@ -53,9 +57,15 @@ static int stm32_rcc_bind(struct udevice *dev)
if (ret)
return ret;
- return device_bind_driver_to_node(dev, "stm32_rcc_reset",
- "stm32_rcc_reset",
- dev_ofnode(dev), &child);
+ drv = lists_driver_lookup_name("stm32_rcc_reset");
+ if (!drv) {
+ dev_err(dev, "Cannot find driver stm32_rcc_reset'\n");
+ return -ENOENT;
+ }
+
+ return device_bind_with_driver_data(dev, drv, "stm32_rcc_reset",
+ rcc_clk->soc,
+ dev_ofnode(dev), &child);
}
static const struct misc_ops stm32_rcc_ops = {
@@ -66,6 +76,7 @@ static const struct udevice_id stm32_rcc_ids[] = {
{.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 },
{.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 },
{.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 },
+ {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 },
{ }
};