diff options
| author | Roger Quadros <rogerq@kernel.org> | 2022-10-20 16:30:49 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-10-26 15:21:12 -0400 |
| commit | 9b0b5648d6e4d89aa594022e48894e811c250d5f (patch) | |
| tree | b4ace98fe43682d20639adab97778dca140149c2 /drivers/memory/Kconfig | |
| parent | 37d6d1645a33e410ca0fd9b56c03426b646df1fd (diff) | |
memory: Add TI GPMC driver
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based on
the settings specified in the Device tree and then
probe its children.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Diffstat (limited to 'drivers/memory/Kconfig')
| -rw-r--r-- | drivers/memory/Kconfig | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index c621f5bba3..56b89f17be 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -41,4 +41,23 @@ config TI_AEMIF of 256M bytes of any of these memories can be accessed at a given time via four chip selects with 64M byte access per chip select. +config TI_GPMC + bool "Texas Instruments GPMC driver" + depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 + depends on MEMORY && CLK && OF_CONTROL + help + This driver is for the General Purpose Memory Controller (GPMC) + present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows + interfacing to a variety of asynchronous as well as synchronous + memory drives like NOR, NAND, OneNAND, SRAM. + +if TI_GPMC +config TI_GPMC_DEBUG + bool "Debug Texas Instruments GPMC timings" + default n + help + Enable this to print GPMC timings before and after the GPMC registers + are programmed. This should not be left enabled on production systems. +endif + endmenu |