diff options
| author | Stefan Roese <sr@denx.de> | 2016-09-16 15:07:53 +0200 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2016-09-26 10:42:37 +0200 |
| commit | 9ad5a00712fd1a75b047eca76d9ebaa76609ca11 (patch) | |
| tree | 6d77a3105187f138e995db39ff09c913268e690e /drivers/i2c/mv_i2c.h | |
| parent | 0c0f719ad2f46c8566a56daee37ebdb7c078c3b1 (diff) | |
i2c: mv_i2c.c: Enable runtime speed selection (standard vs fast mode)
This patch adds runtime speed configuration to the mv_i2c driver.
Currently standard (max 100kHz) and fast mode (max 400kHz) are
supported.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'drivers/i2c/mv_i2c.h')
| -rw-r--r-- | drivers/i2c/mv_i2c.h | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/i2c/mv_i2c.h b/drivers/i2c/mv_i2c.h index ae27c447b0..1e6289290d 100644 --- a/drivers/i2c/mv_i2c.h +++ b/drivers/i2c/mv_i2c.h @@ -23,12 +23,7 @@ extern void i2c_clk_enable(void); #define I2C_READ 0 #define I2C_WRITE 1 -#if (CONFIG_SYS_I2C_SPEED == 400000) -#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD \ - | ICR_SCLE) -#else #define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) -#endif #define I2C_ISR_INIT 0x7FF /* ----- Control register bits ---------------------------------------- */ @@ -48,7 +43,15 @@ extern void i2c_clk_enable(void); #define ICR_ALDIE 0x1000 /* enable arbitration interrupt */ #define ICR_SADIE 0x2000 /* slave address detected int enable */ #define ICR_UR 0x4000 /* unit reset */ -#define ICR_FM 0x8000 /* Fast Mode */ +#ifdef CONFIG_ARMADA_3700 +#define ICR_SM 0x00000 /* Standard Mode */ +#define ICR_FM 0x10000 /* Fast Mode */ +#define ICR_MODE_MASK 0x30000 /* Mode mask */ +#else +#define ICR_SM 0x00000 /* Standard Mode */ +#define ICR_FM 0x08000 /* Fast Mode */ +#define ICR_MODE_MASK 0x18000 /* Mode mask */ +#endif /* ----- Status register bits ----------------------------------------- */ |