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authorArmando Visconti <armando.visconti@st.com>2012-12-06 00:04:16 +0000
committerTom Rini <trini@ti.com>2012-12-11 13:17:32 -0700
commit491739bb7456b95bb863421f6cd76af0ff9b797c (patch)
treec2bfb6e77985079fc24794cc1c512d621a268000 /drivers/i2c/designware_i2c.h
parentac6e2fe6e4afe54a9c7ef0d93827a86e264814f2 (diff)
designware_i2c: Added s/w generation of stop bit
In the newer versions of designware i2c IP there is the possibility of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically requires the s/w to generate the stop bit condition directly, as the h/w will not automatically generate it when TX_FIFO is empty. To avoid generation of an extra 0x0 byte sent as data, the IC_STOP command must be sent along with the last IC_CMD. This patch always writes bit[9] of ic_data_cmd even in the older versions, assuming that it is a noop there. Signed-off-by: Armando Visconti <armando.visconti@st.com>
Diffstat (limited to 'drivers/i2c/designware_i2c.h')
-rw-r--r--drivers/i2c/designware_i2c.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
index 03b520ed43..e004152ac3 100644
--- a/drivers/i2c/designware_i2c.h
+++ b/drivers/i2c/designware_i2c.h
@@ -95,6 +95,7 @@ struct i2c_regs {
/* i2c data buffer and command register definitions */
#define IC_CMD 0x0100
+#define IC_STOP 0x0200
/* i2c interrupt status register definitions */
#define IC_GEN_CALL 0x0800