diff options
author | Wolfgang Denk <wd@denx.de> | 2010-12-22 21:16:17 +0100 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2010-12-22 21:16:17 +0100 |
commit | cdc51c294ad33879c4e57edf4c9d2155381b1d59 (patch) | |
tree | fc1c3f2c23a2507e91358a6a6dfa881965bf603f /drivers/gpio/mvmfp.c | |
parent | 250ef029844be2cb98635f265359396866d1749f (diff) | |
parent | b8339e2b9f32663411dba0f48e25b23f542d53bc (diff) |
Merge branch 'next' of ../next
Diffstat (limited to 'drivers/gpio/mvmfp.c')
-rw-r--r-- | drivers/gpio/mvmfp.c | 87 |
1 files changed, 87 insertions, 0 deletions
diff --git a/drivers/gpio/mvmfp.c b/drivers/gpio/mvmfp.c new file mode 100644 index 0000000000..5646ed4370 --- /dev/null +++ b/drivers/gpio/mvmfp.c @@ -0,0 +1,87 @@ +/* + * (C) Copyright 2010 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com>, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <mvmfp.h> +#include <asm/arch/mfp.h> +#ifdef CONFIG_ARMADA100 +#include <asm/arch/armada100.h> +#else +#error Unsupported SoC... +#endif + +/* + * mfp_config + * + * On most of Marvell SoCs (ex. ARMADA100) there is Multi-Funtion-Pin + * configuration registers to configure each GPIO/Function pin on the + * SoC. + * + * This function reads the array of values for + * MFPR_X registers and programms them into respective + * Multi-Function Pin registers. + * It supports - Alternate Function Selection programming. + * + * Whereas, + * The Configureation value is constructed using MFP() + * array consists of 32bit values as defined in MFP(xx,xx..) macro + */ +void mfp_config(u32 *mfp_cfgs) +{ + u32 *p_mfpr = NULL; + u32 cfg_val, val; + + do { + cfg_val = *mfp_cfgs++; + /* exit if End of configuration table detected */ + if (cfg_val == MFP_EOC) + break; + + p_mfpr = (u32 *)(MV_MFPR_BASE + + MFP_REG_GET_OFFSET(cfg_val)); + + /* Write a mfg register as per configuration */ + val = 0; + if (cfg_val & MFP_AF_FLAG) + /* Abstract and program Afternate-Func Selection */ + val |= cfg_val & MFP_AF_MASK; + if (cfg_val & MFP_EDGE_FLAG) + /* Abstract and program Edge configuration */ + val |= cfg_val & MFP_LPM_EDGE_MASK; + if (cfg_val & MFP_DRIVE_FLAG) + /* Abstract and program Drive configuration */ + val |= cfg_val & MFP_DRIVE_MASK; + if (cfg_val & MFP_PULL_FLAG) + /* Abstract and program Pullup/down configuration */ + val |= cfg_val & MFP_PULL_MASK; + + writel(val, p_mfpr); + } while (1); + /* + * perform a read-back of any MFPR register to make sure the + * previous writings are finished + */ + readl(p_mfpr); +} |