fpga: xilinx: pass compatible flags to load() callback

These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>

7 files changed, 7 insertions, 7 deletions

diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index fe37752210..47692e3207 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -40,7 +40,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Generic Implementation */
 static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-			 bitstream_type bstype)
+			 bitstream_type bstype, int flags)
 {
 	int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 4850c99352..918f6db506 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Generic Implementation */
 static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
-			 bitstream_type bstype)
+			 bitstream_type bstype, int flags)
 {
 	int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index c44a7d3455..d3876a8f54 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -27,7 +27,7 @@ static ulong versal_align_dma_buffer(ulong *buf, u32 len)
 }
 
 static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
-		       bitstream_type bstype)
+		       bitstream_type bstype, int flags)
 {
 	ulong bin_buf;
 	int ret;
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 2e764bdcd5..51b8d31205 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -83,7 +83,7 @@ static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
 static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
 static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-			bitstream_type bstype)
+			bitstream_type bstype, int flags)
 {
 	int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index d9951ca3ec..8170c3368e 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -151,7 +151,7 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
 		return FPGA_FAIL;
 	}
 
-	return desc->operations->load(desc, buf, bsize, bstype);
+	return desc->operations->load(desc, buf, bsize, bstype, flags);
 }
 
 #if defined(CONFIG_CMD_FPGA_LOADFS)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 19d079c9d9..a062456788 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -200,7 +200,7 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
 }
 
 static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
-		     bitstream_type bstype)
+		     bitstream_type bstype, int flags)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
 	u32 swap = 0;
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 2de40109a8..d8ebd542ab 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -371,7 +371,7 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
 }
 
 static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
-		     bitstream_type bstype)
+		     bitstream_type bstype, int flags)
 {
 	unsigned long ts; /* Timestamp */
 	u32 isr_status, swap;