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authorNovasys Ingenierie <xilinx@novasys-ingenierie.com>2013-11-27 09:03:01 +0100
committerMichal Simek <michal.simek@xilinx.com>2014-02-06 10:08:03 +0100
commitc83a35f65250a8bdb519cb26680437e5c93d133d (patch)
tree16897cb24add276f1939a6de6283bc11e4de8a0e /drivers/fpga
parente141652b9cd0cb4f899f7a0fd71c8a438300e365 (diff)
fpga: zynq: Correct fpga load when buf is not aligned
When ARCH_DMA_MINALIGN is greater than header size of the bit file, and buf is not aligned, new_buf address became greater then buf_start address and the load_word loop corrupts bit file data. A work around is to decrease new_buf of ARCH_DMA_MINALIGN, it might corrupt data before buf but permits to load correctly. Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/fpga')
-rw-r--r--drivers/fpga/zynqpl.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 1effbadda90..15900c9ef26 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -187,6 +187,16 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
+ /*
+ * This might be dangerous but permits to flash if
+ * ARCH_DMA_MINALIGN is greater than header size
+ */
+ if (new_buf > buf_start) {
+ debug("%s: Aligned buffer is after buffer start\n",
+ __func__);
+ new_buf -= ARCH_DMA_MINALIGN;
+ }
+
printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
(u32)buf_start, (u32)new_buf, swap);