summaryrefslogtreecommitdiff
path: root/drivers/dma
diff options
context:
space:
mode:
authorHan Xu <han.xu@nxp.com>2017-07-19 11:43:08 -0500
committerYe Li <ye.li@nxp.com>2018-04-27 06:14:41 -0700
commit029cce25cce94c30dd0305bb9b17ba7f939ee1af (patch)
tree8e1c5267a29727920c73fbdc6276779c6230a312 /drivers/dma
parentd297f33f4719502aa415dc7c7002c437a6af6c28 (diff)
MLK-16034-02: enable GPMI NAND driver for i.MX8
enable the GPMI NAND driver for i.MX8, the major changes - register defination for i.mx8 - Makefile change for misc.c - DMA structure must be 32bit address Signed-off-by: Han Xu <han.xu@nxp.com> (cherry picked from commit 474c4270108551647c7064a23abdc2e11d7f37ab)
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/apbh_dma.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index bd1c6fff50..f8422dda17 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -6,6 +6,7 @@
*
* Based on code from LTIB:
* Copyright (C) 2010-2016 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -88,7 +89,7 @@ void mxs_dma_flush_desc(struct mxs_dma_desc *desc)
uint32_t addr;
uint32_t size;
- addr = (uint32_t)desc;
+ addr = (uintptr_t)desc;
size = roundup(sizeof(struct mxs_dma_desc), MXS_DMA_ALIGNMENT);
flush_dcache_range(addr, addr + size);
@@ -215,8 +216,8 @@ static int mxs_dma_reset(int channel)
#if defined(CONFIG_MX23)
uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_ctrl0_set);
uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
-#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8M))
- uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
+#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M))
+ uint32_t setreg = (uintptr_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
#endif
@@ -224,7 +225,7 @@ static int mxs_dma_reset(int channel)
if (ret)
return ret;
- writel(1 << (channel + offset), setreg);
+ writel(1 << (channel + offset), (uintptr_t)setreg);
return 0;
}