diff options
| author | Ye Li <ye.li@nxp.com> | 2020-03-23 03:58:12 -0700 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2022-04-06 18:03:34 +0800 |
| commit | 50a99585b6f0bcbbaf198119e8c17086610b792e (patch) | |
| tree | 5a39ad56239464f5a6ce3f646461648d9d9b4029 /drivers/ddr | |
| parent | 1a849c8a13192807d7c8468d3c10fbcede93daa9 (diff) | |
MLK-23662-1 ddr: imx8m: add print for DRAM rate
Enable print to show the DRAM rate of current setting and training
result.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 8fa319ae929c37f119fbfadfbb2881cba337b249)
(cherry picked from commit 02b8665be3c1b278d71d6ceba2b58032d53fab6c)
(cherry picked from commit 2e2691065e9d0eee7c35f9cc8bda734473f4d1e0)
(cherry picked from commit ed2a7d3a51acdf10259e71b81c45c49094265554)
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/imx/imx8m/ddr_init.c | 7 | ||||
| -rw-r--r-- | drivers/ddr/imx/imx8m/ddrphy_utils.c | 2 |
2 files changed, 5 insertions, 4 deletions
diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c index b70bcc383f..57331649ac 100644 --- a/drivers/ddr/imx/imx8m/ddr_init.c +++ b/drivers/ddr/imx/imx8m/ddr_init.c @@ -96,7 +96,7 @@ int ddr_init(struct dram_timing_info *dram_timing) unsigned int tmp, initial_drate, target_freq; int ret; - debug("DDRINFO: start DRAM init\n"); + printf("DDRINFO: start DRAM init\n"); /* Step1: Follow the power up procedure */ if (is_imx8mq()) { @@ -119,6 +119,7 @@ int ddr_init(struct dram_timing_info *dram_timing) initial_drate = dram_timing->fsp_msg[0].drate; /* default to the frequency point 0 clock */ + printf("DDRINFO: DRAM rate %dMTS\n", initial_drate); ddrphy_init_set_dfi_clk(initial_drate); /* D-aasert the presetn */ @@ -185,7 +186,7 @@ int ddr_init(struct dram_timing_info *dram_timing) tmp = reg32_read(DDRPHY_CalBusy(0)); } while ((tmp & 0x1)); - debug("DDRINFO:ddrphy calibration done\n"); + printf("DDRINFO:ddrphy calibration done\n"); /* Step15: Set SWCTL.sw_done to 0 */ reg32_write(DDRC_SWCTL(0), 0x00000000); @@ -238,7 +239,7 @@ int ddr_init(struct dram_timing_info *dram_timing) /* enable port 0 */ reg32_write(DDRC_PCTRL_0(0), 0x00000001); - debug("DDRINFO: ddrmix config done\n"); + printf("DDRINFO: ddrmix config done\n"); board_dram_ecc_scrub(); diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c index 0f8baefb1f..326b92d784 100644 --- a/drivers/ddr/imx/imx8m/ddrphy_utils.c +++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c @@ -104,7 +104,7 @@ int wait_ddrphy_training_complete(void) debug("Training PASS\n"); return 0; } else if (mail == 0xff) { - debug("Training FAILED\n"); + printf("Training FAILED\n"); return -1; } } |