diff options
| author | Ji Luo <ji.luo@nxp.com> | 2018-08-19 19:16:43 +0800 |
|---|---|---|
| committer | Ji Luo <ji.luo@nxp.com> | 2018-08-22 17:36:43 +0800 |
| commit | b0e849fb2dfd483e039571c4fe0aab7f65273bb3 (patch) | |
| tree | dad2851c9abd9beaaed736de1b3931ee5ffec836 /drivers/crypto | |
| parent | d6b9992db082920b55c08d33df1cb03942939e7f (diff) | |
MA-12421 Fix CAAM not work on Android Things
Blob buffer size is 48 bytes larger than the plain text buffer,
set correct range when flush the dcache. Also use cache aligned
buffer for the blob/plain_text to avoid failure in CAAM.
Change-Id: I3b377cfeb8f5bd9c76233827b2c9c7bd0d788c9b
Signed-off-by: Ji Luo <ji.luo@nxp.com>
Diffstat (limited to 'drivers/crypto')
| -rw-r--r-- | drivers/crypto/fsl_caam.c | 20 | ||||
| -rw-r--r-- | drivers/crypto/fsl_caam_internal.h | 2 |
2 files changed, 12 insertions, 10 deletions
diff --git a/drivers/crypto/fsl_caam.c b/drivers/crypto/fsl_caam.c index c176294774..52c8797c2b 100644 --- a/drivers/crypto/fsl_caam.c +++ b/drivers/crypto/fsl_caam.c @@ -141,16 +141,16 @@ u32 caam_decap_blob(u32 plain_text, u32 blob_addr, u32 size) init_job_desc(decap_desc, 0); append_load(decap_desc, PTR2CAAMDMA(skeymod), key_sz, LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_KEY); - append_seq_in_ptr_intlen(decap_desc, blob_addr, size + 48, 0); + append_seq_in_ptr_intlen(decap_desc, blob_addr, size + CAAM_PAD_LEN, 0); append_seq_out_ptr_intlen(decap_desc, plain_text, size, 0); append_operation(decap_desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB); flush_dcache_range((uintptr_t)blob_addr & ALIGN_MASK, ((uintptr_t)blob_addr & ALIGN_MASK) - + ROUND(2 * size, ARCH_DMA_MINALIGN)); + + ROUND(size + CAAM_PAD_LEN, ARCH_DMA_MINALIGN)); flush_dcache_range((uintptr_t)plain_text & ALIGN_MASK, (plain_text & ALIGN_MASK) - + ROUND(2 * size, ARCH_DMA_MINALIGN)); + + ROUND(size, ARCH_DMA_MINALIGN)); /* Run descriptor with result written to blob buffer */ ret = do_job(decap_desc); @@ -186,15 +186,15 @@ u32 caam_gen_blob(u32 plain_data_addr, u32 blob_addr, u32 size) append_load(encap_desc, PTR2CAAMDMA(skeymod), key_sz, LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_KEY); append_seq_in_ptr_intlen(encap_desc, plain_data_addr, size, 0); - append_seq_out_ptr_intlen(encap_desc, PTR2CAAMDMA(blob), size + 48, 0); + append_seq_out_ptr_intlen(encap_desc, PTR2CAAMDMA(blob), size + CAAM_PAD_LEN, 0); append_operation(encap_desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB); flush_dcache_range((uintptr_t)plain_data_addr & ALIGN_MASK, (plain_data_addr & ALIGN_MASK) - + ROUND(2 * size, ARCH_DMA_MINALIGN)); + + ROUND(size, ARCH_DMA_MINALIGN)); flush_dcache_range((uintptr_t)blob & ALIGN_MASK, ((uintptr_t)blob & ALIGN_MASK) - + ROUND(2 * size, ARCH_DMA_MINALIGN)); + + ROUND(size + CAAM_PAD_LEN, ARCH_DMA_MINALIGN)); ret = do_job(encap_desc); @@ -544,15 +544,15 @@ static int do_job(u32 *desc) ((uintptr_t)desc & ALIGN_MASK) + ROUND(DESC_MAX_SIZE, ARCH_DMA_MINALIGN)); + flush_dcache_range((uintptr_t)g_jrdata.outrings & ALIGN_MASK, + ((uintptr_t)g_jrdata.outrings & ALIGN_MASK) + + ROUND(DESC_MAX_SIZE, ARCH_DMA_MINALIGN)); + /* Inform HW that a new JR is available */ __raw_writel(1, CAAM_IRJAR0); while (__raw_readl(CAAM_ORSFR0) == 0) ; - flush_dcache_range((uintptr_t)g_jrdata.outrings & ALIGN_MASK, - ((uintptr_t)g_jrdata.outrings & ALIGN_MASK) - + ROUND(DESC_MAX_SIZE, ARCH_DMA_MINALIGN)); - if (PTR2CAAMDMA(desc) == g_jrdata.outrings[0].desc) { ret = g_jrdata.outrings[0].status; } else { diff --git a/drivers/crypto/fsl_caam_internal.h b/drivers/crypto/fsl_caam_internal.h index 852672d1cb..dca8ba7169 100644 --- a/drivers/crypto/fsl_caam_internal.h +++ b/drivers/crypto/fsl_caam_internal.h @@ -252,4 +252,6 @@ typedef enum { RNG_DESC_SH1_SIZE + \ RNG_DESC_KEYS_SIZE) +#define CAAM_PAD_LEN 48 + #endif /* __CAAM_INTERNAL_H__ */ |