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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-03-24 19:24:25 +0100
committerSimon Glass <sjg@chromium.org>2017-04-04 20:01:57 -0600
commit65d833038e27656f881f8902289152879a5c3d99 (patch)
tree5b3c1e1d335c98439b0d50520d3faec5fc117e17 /drivers/clk
parent61dff33b52335e674cf175b75e87d3300ded46d8 (diff)
rockchip: clk: rk3399: add clocking support for Ethernet
The Ethernet driver for the RK3288/3399 GMAC makes sure that the clock is ungated through a call to clk_set_rate(...). Even though nothing needs to be done on the RK3399 (the clock gates are open and the clock is external), we need to implement enough support to at least return success to enable driver probing. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/rockchip/clk_rk3399.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 453c6dd8d2..1ac4ff4b2b 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -802,6 +802,10 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
case SCLK_EMMC:
ret = rk3399_mmc_set_clk(priv->cru, clk->id, rate);
break;
+ case SCLK_MAC:
+ /* nothing to do, as this is an external clock */
+ ret = rate;
+ break;
case SCLK_I2C1:
case SCLK_I2C2:
case SCLK_I2C3: