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| author | Tom Rini <trini@konsulko.com> | 2020-04-16 17:14:44 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-04-16 17:14:44 -0400 |
| commit | 0f238dab6d17caabe4f9781d23aaa6087139f2bd (patch) | |
| tree | 4c3aaa186537f37fe3bfd6240862a74b32ffd837 /drivers/clk | |
| parent | cf87f7cd8cdb35761103720a102df9bf5b88c1b2 (diff) | |
| parent | 7b50db8242b62c85a19da9521b703faa858f4a63 (diff) | |
Merge tag 'arc-fixes-for-2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
This is pretty minor set of changes mostly touching HSDK board:
* Enable on-chip reset controller on HSDK
* Add possibility to turn-on & off L2$ on more
recent ARC HS processors.
* AXI tunnel clock calculation on HSDK
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/clk-hsdk-cgu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c index 4637b9fdf1..6eaafdeaf9 100644 --- a/drivers/clk/clk-hsdk-cgu.c +++ b/drivers/clk/clk-hsdk-cgu.c @@ -144,7 +144,7 @@ struct hsdk_tun_clk_cfg { static const struct hsdk_tun_clk_cfg tun_clk_cfg = { { 25000000, 50000000, 75000000, 100000000, 125000000, 150000000 }, - { 600000000, 600000000, 600000000, 600000000, 700000000, 600000000 }, { + { 600000000, 600000000, 600000000, 600000000, 750000000, 600000000 }, { { CGU_TUN_IDIV_TUN, { 24, 12, 8, 6, 6, 4 } }, { CGU_TUN_IDIV_ROM, { 4, 4, 4, 4, 5, 4 } }, { CGU_TUN_IDIV_PWM, { 8, 8, 8, 8, 10, 8 } } @@ -205,6 +205,7 @@ static const struct hsdk_pll_cfg asdt_pll_cfg[] = { { 500000000, 0, 14, 1, 0 }, { 600000000, 0, 17, 1, 0 }, { 700000000, 0, 20, 1, 0 }, + { 750000000, 1, 44, 1, 0 }, { 800000000, 0, 23, 1, 0 }, { 900000000, 1, 26, 0, 0 }, { 1000000000, 1, 29, 0, 0 }, |