diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-09-22 07:42:22 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-09-23 01:00:39 +0900 |
| commit | 6dc5b6b1ff030a811d1747c19009d9f3b0908099 (patch) | |
| tree | 81513bd6dc0464840108d1c64bbd047d7a5f1ff9 /drivers/clk | |
| parent | 102e318777a5ee400e75996e99570d4f5bbde4aa (diff) | |
clk: uniphier: allow to have clock node under syscon node
To sync the DT binding with Linux, the register base must be taken
from the parent syscon node.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/uniphier/clk-uniphier-core.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index 2db4a7c0bd..394832607e 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c @@ -30,7 +30,7 @@ int uniphier_clk_probe(struct udevice *dev) struct uniphier_clk_priv *priv = dev_get_priv(dev); fdt_addr_t addr; - addr = dev_get_addr(dev); + addr = dev_get_addr(dev->parent); if (addr == FDT_ADDR_T_NONE) return -EINVAL; @@ -159,35 +159,35 @@ const struct clk_ops uniphier_clk_ops = { static const struct udevice_id uniphier_clk_match[] = { { - .compatible = "socionext,ph1-sld3-mioctrl", + .compatible = "socionext,uniphier-sld3-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { - .compatible = "socionext,ph1-ld4-mioctrl", + .compatible = "socionext,uniphier-ld4-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { - .compatible = "socionext,ph1-pro4-mioctrl", + .compatible = "socionext,uniphier-pro4-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { - .compatible = "socionext,ph1-sld8-mioctrl", + .compatible = "socionext,uniphier-sld8-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { - .compatible = "socionext,ph1-pro5-mioctrl", + .compatible = "socionext,uniphier-pro5-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { - .compatible = "socionext,proxstream2-mioctrl", + .compatible = "socionext,uniphier-pxs2-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { - .compatible = "socionext,ph1-ld11-mioctrl", + .compatible = "socionext,uniphier-ld11-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { - .compatible = "socionext,ph1-ld20-mioctrl", + .compatible = "socionext,uniphier-ld20-mio-clock", .data = (ulong)&uniphier_mio_clk_data, }, { /* sentinel */ } |