diff options
| author | Dave Liu <daveliu@freescale.com> | 2010-04-12 14:23:25 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-04-26 22:37:54 -0500 |
| commit | e4773debb735323a9eedf353239e8e88e03d7c58 (patch) | |
| tree | 3369f186c8ee74fa3e6bcc1e8abcddfc593bb17c /drivers/block | |
| parent | 99bac479dd183529f4e259a0de8d31644219d487 (diff) | |
fsl_sata: Add the workaround for errata SATA-A001
After power on, the SATA host controller of P1022 Rev1 is configured
in legacy mode instead of the expected enterprise mode.
Software needs to clear bit[28] of HControl register to change to
enterprise mode after bringing the host offline.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers/block')
| -rw-r--r-- | drivers/block/fsl_sata.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c index abcda6fb5fd..88785605fa7 100644 --- a/drivers/block/fsl_sata.c +++ b/drivers/block/fsl_sata.c @@ -21,6 +21,7 @@ #include <common.h> #include <command.h> #include <asm/io.h> +#include <asm/processor.h> #include <malloc.h> #include <libata.h> #include <fis.h> @@ -191,6 +192,27 @@ int init_sata(int dev) /* Wait the controller offline */ ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000); +#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001) + /* + * For P1022/1013 Rev1.0 silicon, after power on SATA host + * controller is configured in legacy mode instead of the + * expected enterprise mode. software needs to clear bit[28] + * of HControl register to change to enterprise mode from + * legacy mode. + */ + { + u32 svr = get_svr(); + if (IS_SVR_REV(svr, 1, 0) && + ((SVR_SOC_VER(svr) == SVR_P1022) || + (SVR_SOC_VER(svr) == SVR_P1022_E) || + (SVR_SOC_VER(svr) == SVR_P1013) || + (SVR_SOC_VER(svr) == SVR_P1013_E))) { + out_le32(®->hstatus, 0x20000000); + out_le32(®->hcontrol, 0x00000100); + } + } +#endif + /* Set the command header base address to CHBA register to tell DMA */ out_le32(®->chba, (u32)cmd_hdr & ~0x3); |