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author | Stefan Agner <stefan.agner@toradex.com> | 2018-05-29 18:54:08 +0200 |
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committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-06-06 13:17:12 +0200 |
commit | 2881fc12d952a7907ae58aff5cecf791055f2301 (patch) | |
tree | e48c83ffb9d6c95620dd504d8c5f6e97a75faa6e /drivers/block/mvsata_ide.c | |
parent | 3ad050d4e42d2c5125c196ddd8bf213f0c387b07 (diff) |
ARM: vf610: fix initialization completion detection
The CR80 register has multiple interrupt bits, the code is supposed
to check bit 8 but instead uses a logical and. In most cases this
probably did not affect real operations since at that stage typically
none of the other bits are set.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'drivers/block/mvsata_ide.c')
0 files changed, 0 insertions, 0 deletions