diff options
author | Jens Scharsig <js_at_ng@scharsoft.de> | 2010-02-03 22:45:42 +0100 |
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committer | Tom Rix <Tom.Rix@windriver.com> | 2010-02-12 12:31:54 -0600 |
commit | 425de62d40f84524b90e776b141b060cd438a9fe (patch) | |
tree | 2ec5d36153c265b896d1e87f3dab07471353a372 /doc | |
parent | 3a4e43921d2599453ea87c623099e5f347c9e54a (diff) |
add new CONFIG_AT91_LEGACY
* add's the new temporary CONFIG_AT91_LEGACY to all board configs
This will need for backward compatiblity, while change the SoC access
to c structures. If CONFIG_AT91_LEGACY is defined, the deprecated
SoC is used.
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/README.at91-soc | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/doc/README.at91-soc b/doc/README.at91-soc new file mode 100644 index 00000000000..bed035c88d2 --- /dev/null +++ b/doc/README.at91-soc @@ -0,0 +1,41 @@ + New C structure AT91 SoC access +================================= + +The goal +-------- + +Currently the at91 arch uses hundreds of address defines and special +at91_xxxx_write/read functions to access the SOC. +The u-boot project perferred method is to access memory mapped hw +regisister via a c structure. + +e.g. old + + *AT91C_PIOA_IDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_PUDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_PER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_OER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + *AT91C_PIOC_PIO = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + + at91_sys_write(AT91_RSTC_CR, + AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); + +e.g new + pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK; + writel(pin, &pio->pioa.idr); + writel(pin, &pio->pioa.pudr); + writel(pin, &pio->pioa.per); + writel(pin, &pio->pioa.oer); + writel(pin, &pio->pioa.sodr); + + writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST | + AT91_RSTC_CR_PERRST, &rstc->cr); + +The method for updating +------------------------ + +1. add's the temporary CONFIG_AT91_LEGACY to all at91 board configs +2. Display a compile time warning, if the board has not been converted +3. add new structures for SoC access +4. Convert arch, driver and boards file to new SoC +5. remove legacy code, if all boards and drives are ready |