diff options
| author | Peng Fan <peng.fan@nxp.com> | 2017-06-12 17:50:55 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2017-07-12 09:44:22 +0200 |
| commit | f34ccce50a1805a6fdb2d1604ec4e40d79302455 (patch) | |
| tree | 5ae7352495e110941cb517422c023ea92340deda /doc | |
| parent | 4483b7eb8874cb78a1ebddfcd599bec00c87ab71 (diff) | |
mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.fsl-esdhc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc index 7e713875763..29cc6619eab 100644 --- a/doc/README.fsl-esdhc +++ b/doc/README.fsl-esdhc @@ -20,5 +20,3 @@ Freescale esdhc-specific options - CONFIG_SYS_FSL_ESDHC_BE ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined by ESDHC IP's endian mode or processor's endian mode. - - - CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V. |