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authorTom Rini <trini@konsulko.com>2016-06-20 05:15:52 -0400
committerTom Rini <trini@konsulko.com>2016-06-20 05:15:52 -0400
commit2313d48445e59f063ec9a3b4940fe8252737db76 (patch)
treede829dc59a4b4437ddf5f3f2bde8c56ffda17395 /doc
parent1a3619cf825fcef15ebe0fac6d65a9af1bc0588c (diff)
parent30780f948346436f9974fd6eae89aa2eb841b436 (diff)
Merge git://git.denx.de/u-boot-nand-flash
Diffstat (limited to 'doc')
-rw-r--r--doc/README.nand10
1 files changed, 7 insertions, 3 deletions
diff --git a/doc/README.nand b/doc/README.nand
index 96ffc48940..f1c20ff645 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -137,7 +137,7 @@ Configuration Options:
init:
/* chip is struct nand_chip, and is now provided by the driver. */
- mtd = &chip.mtd;
+ mtd = nand_to_mtd(&chip);
/*
* Fill in appropriate values if this driver uses these fields,
@@ -271,7 +271,7 @@ Platform specific options
However, for 4K pagesize NAND
NAND_PAGESIZE = 4096
- NAND_OOBSIZE = 64
+ NAND_OOBSIZE = 224
ECC_BYTES = 26
2 + (4096 / 512) * 26 = 210 < NAND_OOBSIZE
Thus BCH16 can be supported on 4K page NAND.
@@ -307,7 +307,7 @@ Miscellaneous and testing commands:
DANGEROUS!!! Factory set bad blocks will be lost. Use only
to remove artificial bad blocks created with the "markbad" command.
- "torture offset"
+ "torture offset [size]"
Torture block to determine if it is still reliable.
Enabled by the CONFIG_CMD_NAND_TORTURE configuration option.
This command returns 0 if the block is still reliable, else 1.
@@ -324,6 +324,10 @@ Miscellaneous and testing commands:
automate actions following a nand->write() error. This would e.g. be required
in order to program or update safely firmware to NAND, especially for the UBI
part of such firmware.
+ Optionally, a second parameter size can be given to test multiple blocks with
+ one call. If size is not a multiple of the NAND's erase size, then the block
+ that contains offset + size will be tested in full. If used with size, this
+ command returns 0 if all tested blocks have been found reliable, else 1.
NAND locking command (for chips with active LOCKPRE pin)