diff options
| author | Dave Gerlach <d-gerlach@ti.com> | 2022-03-17 12:03:41 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-04-04 19:02:04 -0400 |
| commit | 7b8a96e57e1db60f742184822a7d8dc508605f1f (patch) | |
| tree | 6cfc330806c4ba6eada5313f7dbc0825150a7a12 /doc/device-tree-bindings | |
| parent | dffdb1f8eb2a88290896dd31f9e8d33789ba3757 (diff) | |
dt-bindings: memory-controller: Add information about ECC bindings
Add DT binding documentation for enabling ECC in the DDR sub system present
on AM64 device.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt index dd0260b394..df3290a6b9 100644 --- a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt +++ b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt @@ -13,6 +13,7 @@ Required properties: "ti,am64-ddrss" for am642 - reg-names cfg - Map the controller configuration region ctrl_mmr_lp4 - Map LP4 register region in ctrl mmr + ss - Map the DDRSS configuration region - reg: Contains the register map per reg-names. - power-domains: Should contain two entries: - an entry to TISCI DDR CFG device @@ -32,6 +33,13 @@ Required properties: - ti,pi-data: An array containing the phy independent block settings - ti,phy-data: An array containing the ddr phy settings. +Optional properties: +-------------------- +- reg-names ss - Map the DDRSS configuration region +- reg: Must add "ss" to list if the above ss region is included. +- ti,ecc-enable: Boolean flag to enable ECC. This will reduce available DDR + by 1/9. + Example (J721E): ================ |