diff options
| author | Patrick Delaunay <patrick.delaunay@st.com> | 2018-07-16 10:41:46 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-07-20 15:55:07 -0400 |
| commit | d219415544f099c5e553a556dc277377b9dbf64f (patch) | |
| tree | 25f7ff616528dbe10565fca2dc3d6654d4464752 /doc/device-tree-bindings | |
| parent | 5b25eb9f2286613a490a3afb510d2859a4c030c5 (diff) | |
stm32mp1: clk: support digital bypass
HSE and LSE bypass shall support both analog and digital signals.
This patch add a way to select digital bypas case in the device tree
and set the associated bit DIGBYP in RCC_BDCR and RCC_OCEN register
during clock tree initialization.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/clock/st,stm32mp1.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt b/doc/device-tree-bindings/clock/st,stm32mp1.txt index c29d90f2db..6a9397e105 100644 --- a/doc/device-tree-bindings/clock/st,stm32mp1.txt +++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt @@ -170,8 +170,10 @@ Optional properties : a) for external oscillator: "clk-lse", "clk-hse" - 3 optional fields are managed + 4 optional fields are managed - "st,bypass" Configure the oscillator bypass mode (HSEBYP, LSEBYP) + - "st,digbypass" Configure the bypass mode as full-swing digital signal + (DIGBYP) - "st,css" Activate the clock security system (HSECSSON, LSECSSON) - "st,drive" (only for LSE) value of the drive for the oscillator (see LSEDRV_ define in the file dt-bindings/clock/stm32mp1-clksrc.h) |