diff options
author | Simon Glass <sjg@chromium.org> | 2015-07-02 18:16:09 -0600 |
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committer | Simon Glass <sjg@chromium.org> | 2015-08-05 21:06:13 -0600 |
commit | bcd5dfffe6d7827c5c1df96b2e5168036d522220 (patch) | |
tree | a21f8a8f376e42c238e4be68097db7c66be6df6a /doc/device-tree-bindings/video | |
parent | 5eaeadaa3afee088421e26cbbc07b6969a9e3425 (diff) |
dm: video: Add support for the Parade PS8622/625 bridge
This chip provides an eDP to LVDS bridge which is useful for SoCs that don't
support LVDS displays (or it would waste scarce pins). The setup is included
in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/device-tree-bindings/video')
-rw-r--r-- | doc/device-tree-bindings/video/bridge/ps8622.txt | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/video/bridge/ps8622.txt b/doc/device-tree-bindings/video/bridge/ps8622.txt new file mode 100644 index 00000000000..66d5d07ebb8 --- /dev/null +++ b/doc/device-tree-bindings/video/bridge/ps8622.txt @@ -0,0 +1,33 @@ +ps8622-bridge bindings + +Required properties: + - compatible: "parade,ps8622" or "parade,ps8625" + - reg: first i2c address of the bridge + - sleep-gpios: OF device-tree gpio specification for PD_ pin. + - reset-gpios: OF device-tree gpio specification for RST_ pin. + - parade,regs: List of 3-byte registers tuples to write: + <I2C chip address offset> <register> <value> + +Optional properties: + - lane-count: number of DP lanes to use + - use-external-pwm: backlight will be controlled by an external PWM + - video interfaces: Device node can contain video interface port + nodes for panel according to [1]. + +[1]: Documentation/devicetree/bindings/media/video-interfaces.txt + +Example: + lvds-bridge@48 { + compatible = "parade,ps8622"; + reg = <0x48>; + sleep-gpios = <&gpc3 6 1 0 0>; + reset-gpios = <&gpc3 1 1 0 0>; + lane-count = <1>; + ports { + port@0 { + bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; |