doc: board: Add coreboot board doc

This extracts coreboot board specific information from README.x86,
converts plain text documentation to reST format and adds it to
Sphinx TOC tree. No essential content change.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

3 files changed, 52 insertions, 0 deletions

diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
new file mode 100644
index 00000000000..fd974229eb4
--- /dev/null
+++ b/doc/board/coreboot/coreboot.rst
@@ -0,0 +1,42 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Coreboot
+========
+
+Build Instructions for U-Boot as coreboot payload
+-------------------------------------------------
+Building U-Boot as a coreboot payload is just like building U-Boot for targets
+on other architectures, like below::
+
+   $ make coreboot_defconfig
+   $ make all
+
+Test with coreboot
+------------------
+For testing U-Boot as the coreboot payload, there are things that need be paid
+attention to. coreboot supports loading an ELF executable and a 32-bit plain
+binary, as well as other supported payloads. With the default configuration,
+U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
+generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
+provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
+this capability yet. The command is as follows::
+
+   # in the coreboot root directory
+   $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
+     -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
+
+Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
+of _x86boot_start (in arch/x86/cpu/start.S).
+
+If you want to use ELF as the coreboot payload, change U-Boot configuration to
+use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
+
+To enable video you must enable these options in coreboot:
+
+   - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
+   - Keep VESA framebuffer
+
+At present it seems that for Minnowboard Max, coreboot does not pass through
+the video information correctly (it always says the resolution is 0x0). This
+works correctly for link though.
diff --git a/doc/board/coreboot/index.rst b/doc/board/coreboot/index.rst
new file mode 100644
index 00000000000..d148db95f36
--- /dev/null
+++ b/doc/board/coreboot/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Coreboot
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   coreboot
diff --git a/doc/board/index.rst b/doc/board/index.rst
index 59f745d7e5f..eb21a67346a 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -6,5 +6,6 @@ Board-specific doc
 .. toctree::
    :maxdepth: 2
 
+   coreboot/index
    google/index
    intel/index