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| author | Tom Rini <trini@konsulko.com> | 2016-02-08 09:48:04 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-02-08 09:48:04 -0500 |
| commit | 57dc53a72460e8e301fa1cc7951b41db8e731485 (patch) | |
| tree | 856a679e994fdc529a97763e851ed2e546ba3742 /doc/README.mpc85xx-spin-table | |
| parent | 7b6dc11c1aa69e5cc22d1659f50594edcfab5a9e (diff) | |
| parent | 2300184f702656b72394e458bf15f7aaba8af892 (diff) | |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
Diffstat (limited to 'doc/README.mpc85xx-spin-table')
| -rw-r--r-- | doc/README.mpc85xx-spin-table | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/README.mpc85xx-spin-table b/doc/README.mpc85xx-spin-table index 8da768a2a6..72c7bd7b5d 100644 --- a/doc/README.mpc85xx-spin-table +++ b/doc/README.mpc85xx-spin-table @@ -1,7 +1,7 @@ Spin table in cache ===================================== As specified by ePAPR v1.1, the spin table needs to be in cached memory. After -DDR is initialized and U-boot relocates itself into DDR, the spin table is +DDR is initialized and U-Boot relocates itself into DDR, the spin table is accessible for core 0. It is part of release.S, within 4KB range after __secondary_start_page. For other cores to use the spin table, the booting process is described below: |