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authorEric Sun <jian.sun@freescale.com>2012-05-18 19:57:41 +0800
committerEric Sun <jian.sun@freescale.com>2012-05-18 20:05:39 +0800
commit9b6dfc4b6f0d30b7284511a962e64e83c426b854 (patch)
treecaede78d33459aea738d837a3ccfe9f7087a1901 /cpu
parent66a2afd595643732dc374ff0afccd3a64c1505bc (diff)
ENGR00210014 i.mx6 : i.mx6sl : add PAD_CTL_LVE support for pad configuration
Original pad configuration don't provide enough bitfield width to hold all necessary information. For MX6Sololite, a "PAD_CTL_LVE" is needed to be configed for many pins. iomux_v3_cfg_t is re-orgnized to address this issue. PAD_CTRL is extended by 1 bit to hold the "PAD_CTL_LVE". Which is mapped to proper bit location when configure the PAD config register. Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm_cortexa8/mx6/iomux-v3.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx6/iomux-v3.c b/cpu/arm_cortexa8/mx6/iomux-v3.c
index fbd738f604..a147c4e71f 100644
--- a/cpu/arm_cortexa8/mx6/iomux-v3.c
+++ b/cpu/arm_cortexa8/mx6/iomux-v3.c
@@ -3,7 +3,7 @@
* Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
* <armlinux@phytec.de>
*
- * Copyright (C) 2004-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2012 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -48,8 +48,14 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
if (sel_input_ofs)
__raw_writel(sel_input, base + sel_input_ofs);
- if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
+ if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs) {
+ if (pad_ctrl & PAD_CTL_LVE) {
+ /* Set the bit for LVE */
+ pad_ctrl |= (1 << PAD_CTL_LVE_OFFSET);
+ pad_ctrl &= ~(1 << PAD_CTL_LVE);
+ }
__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
+ }
return 0;
}