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authorMahesh Mahadevan <r9aadq@freescale.com>2011-11-03 08:22:55 -0500
committerJustin Waters <justin.waters@timesys.com>2012-09-05 14:57:54 -0400
commit388770828d6b15123e699216008bb80e01165e3b (patch)
tree6bc4482114c7ad7ff9b810d3c6f372ceb1d68fe2 /cpu
parentca3f1a445e70a4fb613fbe2b204ae48fba66ba13 (diff)
ENGR00161373 Move the MAC address read from fuse code to MX6 SoC file
Move the code to read the mac address from the fuse to SoC file and out of the board file Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm_cortexa8/mx6/generic.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c
index 3ffc42030e..019a3f3a5e 100644
--- a/cpu/arm_cortexa8/mx6/generic.c
+++ b/cpu/arm_cortexa8/mx6/generic.c
@@ -33,6 +33,9 @@
#ifdef CONFIG_ARCH_CPU_INIT
#include <asm/cache-cp15.h>
#endif
+#ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
+#include <asm/arch/regs-ocotp.h>
+#endif
enum pll_clocks {
CPU_PLL1, /* System PLL */
@@ -527,8 +530,6 @@ int clk_info(u32 clk_type)
return 0;
}
-
-
static int config_pll_clk(enum pll_clocks pll, u32 divider)
{
u32 ccsr = readl(CCM_BASE_ADDR + CLKCTL_CCSR);
@@ -737,6 +738,24 @@ int print_cpuinfo(void)
extern int mxc_fec_initialize(bd_t *bis);
extern void mxc_fec_set_mac_from_env(char *mac_addr);
void enet_board_init(void);
+#ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
+int fec_get_mac_addr(unsigned char *mac)
+{
+ unsigned int value;
+
+ value = readl(OCOTP_BASE_ADDR + HW_OCOTP_MACn(0));
+ mac[5] = value & 0xff;
+ mac[4] = (value >> 8) & 0xff;
+ mac[3] = (value >> 16) & 0xff;
+ mac[2] = (value >> 24) & 0xff;
+ value = readl(OCOTP_BASE_ADDR + HW_OCOTP_MACn(1));
+ mac[1] = value & 0xff;
+ mac[0] = (value >> 8) & 0xff;
+
+ return 0;
+}
+#endif
+
#endif
int cpu_eth_init(bd_t *bis)