diff options
author | Terry Lv <r65388@freescale.com> | 2011-01-05 17:03:28 +0800 |
---|---|---|
committer | Justin Waters <justin.waters@timesys.com> | 2012-09-05 14:57:36 -0400 |
commit | 39260c78fc3aa72bc4e997039f9acc4219092275 (patch) | |
tree | b0b4b5186471cee0572d6d6342d5a962206c804f /cpu | |
parent | 92a10af23da36fe905c31bb11372fee6a9980def (diff) |
ENGR00137604: Change PLL4 to 455MHz for mx53
Required by display to set ldb.
We need to set PLL4 to 455MHz.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/arm_cortexa8/mx53/generic.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/cpu/arm_cortexa8/mx53/generic.c b/cpu/arm_cortexa8/mx53/generic.c index 3e3571e76f3..d31d9b50165 100644 --- a/cpu/arm_cortexa8/mx53/generic.c +++ b/cpu/arm_cortexa8/mx53/generic.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -494,6 +494,8 @@ void mxc_dump_clocks(void) printf("mx53 pll2: %dMHz\n", freq / 1000000); freq = __decode_pll(PLL3_CLK, CONFIG_MX53_HCLK_FREQ); printf("mx53 pll3: %dMHz\n", freq / 1000000); + freq = __decode_pll(PLL4_CLK, CONFIG_MX53_HCLK_FREQ); + printf("mx53 pll4: %dMHz\n", freq / 1000000); printf("ipg clock : %dHz\n", mxc_get_clock(MXC_IPG_CLK)); printf("ipg per clock : %dHz\n", mxc_get_clock(MXC_IPG_PERCLK)); printf("uart clock : %dHz\n", mxc_get_clock(MXC_UART_CLK)); @@ -989,6 +991,7 @@ int print_cpuinfo(void) (get_board_rev() & 0xFF) >> 4, (get_board_rev() & 0xF), __get_mcu_main_clk() / 1000000); + mxc_dump_clocks(); return 0; } #endif |